Features of microcontroller




This chapter includes the overview of microcontroller. It consists of history, design simulation, block diagram and some features of microcontroller, the structural and architectural overview of Microcontroller, the Project introduction and purpose of this project.


Microcontroller is a true computer on a single chip, containing processor core, memory and programmable input/output peripherals. A device similar to a microcontroller is a microprocessor. Microprocessor is known as a 'general purpose computer'.

  • Microprocessor - Contains the CPU.
  • Microcontroller - Used to control other devices.


  • Microprocessor - PowerPC chip in computer
  • Microcontroller - 68HC11

Microcontroller consists of ROM, RAM, decoders, I/O ports. A device similar to the microprocessor is a microcontroller found in 'smart' electronic devices

A microcontroller has many uses. It is commonly used to provide a system level solution for things such as controlling a car's electronic system, home security systems, ATM system, communication systems, daily consumer appliances (such as microwave oven, washing machine), and many others. A microprocessor is the CPU of the microcontroller. Within the microprocessor is an arithmetic logic unit (ALU) that allows the microprocessor to process arithmetic and logic according to the instructions given by microprocessor.

The microprocessor is the core of microcontroller so there are few similarities in the architecture of microcontroller and microprocessor.

A Microcontroller is essentially a Microprocessor with several other features embedded onto a single chip. Microcontrollers arrived due to two forces,

  1. Market Need.
  2. Advance Technology

Market need was the consumer and industrial need for more complicated tools. The basic idea of the technology is that more transistors with less space and low cost. Microcontrollers are popular in many regions, and are present in house hold devices, computer equipment, and instrumentation. They are also used in automobiles, and are used in industry as well, and play the central part of industrial robotics. They are used to control a single process and can perform simple instructions. Microcontrollers do not need considerable processing power. These are used in products and devices which are automatically monitored such as automobile engine, power tools, medical devices, office machines, appliances, remote controls, and toys. Microcontrollers on single chip are very slow and very little memory but are cheap and very easy to interface to real world devices.

Microcontrollers are normally programmed in either C or assembly language. A microcontroller has most of its information and data in it and free from outside control, works as small, dedicated computer. Previous controllers were built from logic components and they were large. Each component of a microcontroller control a single functions like a microprocessor, so microcontroller consists of all the components on a single chip. Microcontroller is also general purpose device but one which is meant to fetch data, performs limited calculations on that data, and control its environment based on those calculations. Basic use of a microcontroller is to control the operation of a machine using a fixed program stored in ROM. Microcontrollers are found in small minimum components design performing control oriented activities. These designs were implemented in the past suing dozens of ICs. A microcontroller can reduce the overall components density. All that we just require is a small number of supporting components, and a control program in ROM.

Microcontrollers are used for the 'control' of I/O devices in design requiring a minimum component count. Microcontrollers are anxious with getting data from and to its own pins. Input pins are either digital or analog. Digital inputs are the opposite of digital outputs. Microcontrollers are used because it reduces chip size, many applications do not require as much computing power, reduced power consumption, reduced design cost. Microcontrollers are widely used in today's control systems for the following reasons:

Design and Simulation: Detailed simulations may be performed in advance to assure correctness of code and system performance.

  • Flexibility: Ability to reprogram using Flash, EEPROM or EPROM allows straightforward changes in the control law used.
  • High Integration: Most microcontrollers are essentially single chip computers with on-chip processing, memory, and I/O.
  • Cost: Cost savings come from several locations. Development costs are greatly decreased because of the design/flexibility advantages mentioned previously. Because so many components are included on one IC, board area and component savings are often evident as well.

Easy to Use: Just program and go! While in the past, programming has often involved tedious assembly code, today C compilers are available for most microcontrollers and following are other general usage benefits of microcontrollers:

  • Many applications do not require as much computing power:
  • Reduced power consumption
  • Reduced design cost
  • In fact, industry sells 10 times as many microcontrollers as microprocessors


The components in microcontroller can be described by the following block diagram:


A microcontroller is a single integrated circuit, commonly with the following features:

  • A central processing unit ranging from small and simple 4-bit processors to complex 32 or 64 bit processors.
  • Discrete input and output bits allow the control or detection of the logic state of an individual package pin.
  • Peripherals such as timers, event counters.
  • Volatile memory (RAM) for data storage.
  • ROM, EPROM, EEPROM or Flash memory for program and parameter storage.
  • Clock generator often an oscillator for a quartz timing crystal, resonator or RC circuit.
  • Analog-to-digital converters.
  • Programming the circuit and removing errors from circuit.


Microcontrollers were first considered at Intel in 1969 when a Japanese company approached Intel to build some integrated circuits for calculators. Marcian Huff used his previous experience to propose an alternate solution, a programmable IC. Frederico Faggin transformed this idea to reality and Intel bought the license from the Japanese company (BUSICOM) to create the 4004 4-bit microprocessor capable of 6000 operations per second. This was soon followed by the 8-bit 8008 in 1972. Intel's efforts were soon followed by Motorola with the 8-bit 6800 series and MOS Technology introduced the 6501 and 6502 for only $25 each. It was all downhill from there. The earliest computer system chip which was very effective for control applications was the Intel 8048, allowed to move forward in 1975, having both RAM and ROM on a single chip. One billion PC keyboards and other applications used this chip. Two common forms of the microcontrollers at that time were seen. One had an erasable EEPROM program memory, and other was PROM which was programmable only once. EEPROM was more costly then PROM so as it was expensive as well. EEPROM memory allowed the microcontrollers to be erased at once, and do not cost much as PROM in 1993. Atmel came up with first microcontroller in the same year using Flash memory. Cost has decreased with time, with the cheapest 8-bit microcontrollers. Now microcontrollers are low cost with a lot of components in them. In the future, MRAM (Magneto resistive Random Access Memory) could be used in microcontrollers because of its tolerance and its low cost of semi conductor wafer.


The architecture differs in the way data and programs are stored and accessed. There are different architectures which were used in the past.

  • Von-Neumann Architecture
  • Harvard Architecture
  • RISC
  • CISC
  • Very large Instruction Word (VLIW)


Microcontrollers based on the Von-Neumann architecture have a single data bus that is used to fetch both instructions and data. Program instructions and data are stored in a common main memory; such a controller addresses main memory. It first fetches an instruction, and then it fetches the data to support the instruction. The two separate fetches slows up the controller's operation. Figure 1.5 shows the Von-Neumann Architecture. The Von-Neumann architecture's main advantage is that it simplifies the microcontroller design because only one memory is accessed. In microcontrollers, the contents of RAM can be used for data storage and program instruction storage. For Example: the Motorola 68HC11 microcontroller Von- Neumann architecture.

Example: An Instruction "Read a byte from memory and stores it in the accumulator" as follows:

  • Cycle 1 - Read instruction
  • Cycle 2 - Read data out of RAM and put into Accumulator

These two cycles causes wastage of time. This is the reason the Von-Neuman architecture cannot be used in industrial application because industrial machines requires fast switching and high efficiency.


Microcontrollers based on the Harvard Architecture have separate data bus and an instruction bus. This allows execution to occur in parallel. As an instruction is being "pre-fetched", the current instruction is executing on the data bus. Once the current instruction is complete, the next instruction is ready to go. This pre-fetch theoretically allows for much faster execution than Von-Neuman architecture, on the expense of complexity. The Harvard Architecture executes instructions in fewer instruction cycles than the Von-Neuman architecture.

Example: The same instruction (as shown under Von-Newman architecture) would be executed as follows:

  • Cycle 1: - Complete previous instruction. Read the "Move Data to Accumulator" instruction
  • Cycle 2: - Execute "Move Data to Accumulator" instruction

The speed of Harvard architectures is comparatively high.

1.3.3. CISC Architecture Microcontrollers:

CSIC stands for ''complex instruction set computer''. All of today's microcontrollers are based on the CISC (Complex Instruction Set Computer) concept. When an microcontroller has an instruction set that supports many addressing modes for the arithmetic and logical instructions, data transfer and memory accesses instructions, the microcontroller is said to be of CISC architecture. The typical CISC microcontroller consists of 80 instructions, among which most of them are powerful and concentrate on specific control tasks. It is quite common for the instructions to all behave quite differently. Some of them are being processed on particular address spaces or registers, and others may only identify certain addressing modes. CISC architecture's advantages are that many of the instructions consist of many instructions in them, which allows the programmer to use one instruction instead of using many simple instructions. An example of CISC architecture microcontroller is Intel 8096 family.

1.3.4. RISC Architecture Microcontrollers:

RISC stands for 'reduced instruction set computer'. The industry trend for microprocessor design is for Reduced Instruction Set Computers (RISC) designs. When a microcontroller has an instruction set that supports few addressing modes for the arithmetic and logical instructions and for data transfer instructions, the microcontroller is said to be of RISC architecture.

The benefits of RISC design simplicity are a smaller chip size, smaller pin count, and very low power consumption. Some of the typical features of a RISC Processor- Harvard architecture are:

  1. Allows simultaneous access of program and data.
  2. Overlapping of few operations for increased processing performance.
  3. Instruction pipelining increases execution speed.
  4. Orthogonal (symmetrical) instruction set for programming simplicity.
  5. Allows each instruction to operate on any register or use any addressing mode.

1.3.5. VLIW (Very large Instruction Word)

VLIW microprocessors use a long instruction word that is a combination of several operations combined into one single long instruction word. This allows a VLIW microprocessor to execute multiple operations in parallel..Although both superscalar pipeline and VLIW microprocessors can execute multiple instructions in parallel, each microprocessor is very different and has its own set of advantages and disadvantages.

VLIW microprocessors typically require a compiler that is more complicated as it needs to ensure that code dependency in its long instruction word is kept to a minimum.

1. The VLIW microprocessor takes advantage of the parallelism achieved by packing several instructions into a single VLIW word and executing each instruction within the VLIW word in parallel. However, these instructions must have dependency among them kept to a minimum; otherwise the VLIW microprocessor would not be efficient. VLIW microprocessors rely heavily on the compiler to ensure that the instructions packed into a VLIW word have minimal dependency. Creating that "intelligence" into a VLIW compiler is not trivial; much research has been done in this area. This book does not discuss how an efficient compiler can be created or compiler concepts for VLIW, but concentrates instead on the hardware design of a VLIW microprocessor and how it can be achieved using Verilog HDL.

2. VLIW uses multiple operations in a single long instruction word. If one operation is dependent on another operation within the same VLIW word, the second operation may have to wait for the first operation to complete. In these situations, the compiler would insert NOP (no operation) into the VLIW word, thereby slowing down the efficiency of the VLIW microprocessor


The project is mainly concern with the design and development of 8 bit microcontroller architecture using reconfigurable media (FPGA). The intention of this project is as follows:

* To introduce the concept of microcontroller.

* How microcontrollers is developed.

* How microcontrollers works.

* Use of FPGA


* Use of verilog (HDL)




This chapter includes the hardware programming languages (HDLs), like assembly, VHDL, the arrival of these languages and how they emerged, the programming language we used in the project and importance of these languages. It also consists of brief description of state machine and its type's i.e. Moore and Mealy machine


A programming language is a synthetic language that is produced for mathematical calculations which are done by a machine, specifically a computer. Digital circuit design has developed gradually over the last 25 years. The very first digital circuit was designed with vacuum tubes and transistors. The gate count of first chip was very small. With time designers were able to place circuits with hundreds of gates on a chip. At that time design process became very complicated and designers started using circuit and logic simulation techniques. Because of the complexity of the circuits it was not possible to verify these complex circuits on breadboard, so the computer aided techniques became critical for verification and designing of digital circuits because 10,000 transistors were used on a single chip. The designers started building gate level logic circuits on paper by hand. Making small building blocks and then deriving higher level blocks from them.


The first programming languages updated the modern computer. By the beginning of the twentieth century, punch cards encoded data and directed mechanical processing. In the 1930s and 1940s, the formalisms of Alonzo Church's lambda calculus and Alan Turing's Turing machines provided mathematical abstractions for expressing algorithms; the lambda calculus remains influential in language design.

In the 1940s, the first electrically powered digital computers were shaped. The 1st high-level programming language which was designed for a computer was Plankalkl, which was grow for the German Z3 by Konrad Zuse between 1943 and 1945. However, it was not came into use or being operated till 1998 and 2000.

Early programmers using early computers like in 1950's, commonly UNIVAC I and IBM 701, used machine language programs, which was, the first generation language (1GL). After some time 1GL programming was quickly superseded by similarly machine-specific, but mnemonic, GL took the place of 1GL, which was the second generation languages (2GL) also known as assembly languages or "assembler". After some time in 1950s, assembly language programming, that also consists of macro instructions was then overcome by a "third generation" programming languages (3GL), like FORTRAN, LISP, and COBOL. 3GLs are more theoretical rather than physical and also "portable", and they can be implemented on the computers that do not approve specific machine codes. The latest versions of these programming languages are still in use, and they also have influence on the other programming languages. A language known as ALGOL 60 was introduced in the end of 1950s, and programming languages which came later, are using letting Algol down.


There are different computer languages used in the past for formal description of electronic circuits and digital logic. HDL languages describe the circuit design, operation and it also tests to verify its operations by means of simulation. Programs are being created by the use of programming languages that control the activities of a machine. Programming languages such as FORTRAN, Pascal, and C were used to describe computer programs. In the same way digital designers observed that they also require a language for description of digital circuits. So hardware description language (HDL) came into existence. Now the designers were able to model the concurrency of processes found in hardware elements. HDLs were used for simulation of system boards, interconnect buses, field programmable gate array (FPGAs).

Hardware description languages such as Verilog and VHDL became popular. Verilog HDL originated in 1983. Later on, more advanced version VHDL was developed. It used both verilog and VHDL simulators to simulate large digital circuits. In late 1980s, the introduction of logic synthesis changed the design methodology and register transfer level (RTL) was introduced. Details of gates and their interconnections were removed by logic synthesis tools from RTL description. It also provides an ease to the designers that they no long used to place the gates to build logic circuits and the chip size has reduced to it minimum value.

Now Verilog HDL is an accepted IEEE standard. In 1995, the original standard IEEE was approved. IEEE is the latest Verilog HDL standard that made a lot development to the original standards.


Verilog is a general purpose hardware description language that offers many useful features for hardware design which are as follows:-

* It is easy to use in the designing of MC based devices.

* Verilog HDL allows different languages of abstraction to be mixed in same model so that designer can define hardware model in terms of switches, gates, RTL or behavioural code.

* Verilog HDL is the better choice for the designers because most popular synthesis tools support Verilog HDL.

* The programming language interface (PLI) is a powerful feature that allows the user to write custom C code to interact with the internal data structure of Verilog HDL.


To design and develop the architecture of 8 bit RISC microcontroller, we intentionally opted for Verilog HDL owing to because of its 'C' like syntax. Verilog HDL is more user friendly then VHDL or AHDL , so using Verilog HDL our focus was on the project design rather then worrying about the syntax of language.


A State Machine is a representation of a way which consists of a finite number of states, and changing between those states, and actions. It is same as a "Flow Graph". A finite state machine is an compact representation of a machine with a primitive internal memory. It is also called a Finite State Machine.

2.4.1 Algorithm State Machine

The Algorithmic State Machine (ASM) method is a method for designing finite state machines. It is used to represent diagrams of digital integrated circuits. The flowchart means visually presenting the flow of data through an information processing systems, the operations performed within the system and the sequence in which they are performed.

2.4.2 Composition of ASM Method

The ASM method is composed of the following steps:

I. Create an algorithm, using pseudo code, for the desired operation of the device.

II. Convert the pseudo code

III. Design the data path

IV. Create a detailed ASM chart

2.4.3 Design the Control Logic _Detailed ASM Chart

The design of control logic can be made by the following steps:

Figure (2.1): ASM Chart for design of control logic

An ASM chart consists of an interconnection of three types of basic elements: states, condition checks, and conditional outputs. An ASM state, represented as a rectangle, corresponds to one state of a regular state diagram or finite state machine.

2.4.4 Flow Chart Symbol Sheet

The Flow Chart Symbols Cheat Sheet provides a quick overview of the most common flowcharting symbols. The cheat sheet includes a picture of the flow chart symbol, the flow chart symbol name, and a short description of the symbol.

The flow chart symbol names are derived from the names used in Microsoft Excel, which in turn are derived from the ANSI standard symbol names. Some flow chart symbols have alternate names and uses, and the flowchart symbol cheat sheet notes that where necessary.

Figure (2.3): Flow chart symbol sheet


The name Moore machine comes from that of its promoter, Edward F. Moore, a state-machine pioneer. In a Moore machine, Outputs are a function of the current state only. Hence the state diagram consists of both input and output signals for each transition. So for every input there exists an output state.

Most digital electronic systems are designed as clocked sequential systems. Clocked sequential systems are a restricted form of Moore machine where the state changes only when the global clock signal changes. Typically the current state is stored in flip-flops, and a global clock signal is connected to the "clock" input of the flip-flops.

A Moore machine has the following characteristics:-

* A finite set of states.

* A start state (also called initial state).

* A finite set called the input.

* A transition function

* An output function.

Figure (2.2): A Block Diagram Of Simple Moore State Machine


The name Mealy machine comes from the supporter's concept, George H. Mealy, a state-machine pioneer. Outputs are a function of the current state and the inputs. The Mealy State Machine generates outputs based on:

w The Present State.

w The Inputs to the Machine.

So, it is capable of generating many different patterns of output signals for the same state, depending on the inputs present on the clock cycle. Outputs are shown on transitions since they are determined in the same way as is the next state. It requires less number of states i.e. less circuit area.

In a Mealy machine, an output is produced by each transition. Whenever there is a transition, there must be two states or blanks to be filled, the first state/blank is for the input symbol, and the second state/blank is for the output symbol. Whenever transition is done it is expressed as separated by two semicolons, ";". At the left of the semi colon is the input symbol and to the right is the output symbol.


Figure (2.3): Input Output State Change

A Mealy machine has the following characteristics:-

* A finite set of state.

* A start state (also called initial state).

* A finite set called the input alphabet.

* A transition function (mapping a state to the next state).

* An output function.

Figure (2.4): A Block Diagram Of Simple Mealy State Machine


Figure (2.5): Machine Models


Figure (2.5): Gate Level Models




This chapter includes design details of processing Unit and its components. RTL, block diagram, timing diagrams and working of components of processing unit explained in detail in this chapter. It also includes how data is fetched using buses and registers and then transferred to ALU and memory.


This chapter enlighten about each module with introduction, processing, signal diagram, RTL and Timing diagram. The processor includes Registers, Data paths, control lines and ALU capable of performing Arithmetic & Logic operations on its operands subject to the opcode held in Instruction Register.


In our design of Microcontroller the processing unit includes registers, data paths, control lines and an ALU capable of performing arithmetic & logic operations on it operands with respect to the opcode held in the instruction register. A multiplexer, Mux_1 determines the source of data that is bound for Bus_1. The Second Mux_2 determines the source of data bound for Bus_2. The input data path to Mux_1 is from one of the four internal general registers (R0, R1, R2, R3) and also from the ALU to memory or to Bus_2. The input data paths to MUX_1 are from four internal general purpose registers and from the PC(Program Counter). MUX_2 gets its input from ALU, MUX_1 and memory unit. Hence an instruction can be fetched from memory and placed on BUS_2 and loaded into IR (Instruction Register). A data word can be fetched from memory and control the movement of general purpose register or operand register Reg_Z which is at highest priority to ALU. The result of ALU is placed on BUS_2, loaded into register, transferred to memory. Reg_Z holds a flag which is enabled if the result of the ALU is 0.

Figure (4.1): Block Diagram of Modules in the Microcontroller


Figure (4.2): RTL Design Of processing Unit

Our design of processing unit includes the following:-

1. Arithmetic & Logic Unit

2. D Flip Flop

3. Register Unit

4. Instruction Register

5. Program Counter

6. Memory Unit

7. Address Register


ALU stands for "Arithmetic Logic Unit". ALU circuit performs arithmetic and logical operations. ALU is a fundamental block of the central processing unit (CPU) of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers. The processors inside modern CPUs and graphics processing units (GPUs) accommodate very powerful and complex ALUs, a single component may contain a number of ALUs. ALU performs different logical operations. Logic operations testvarious conditions encountered during processing and allow for different actions to be taken based on the results. The data required to perform the arithmetic and logical functions are inputs from the designated CPU registers and operands. The ALU has direct input and output access to the processor controller, main memory (random access memory or RAM), and input/output devices.

Inputs and outputs flow along an electronic path which is called a bus. The input consists of an instruction word that contains an operation code ("op code"). The operation code determines the ALU's operation to perform and the operands are used in the operation. ALU includes storage places for input operands, operands that are being added, the results. The operations performed on them in the sub-units of the ALU are controlled by gated circuits.


Note: 'a' determines the sources and 'b' determines the destination

NO: Any operation is performed. All registers retain their values No (a,b)

AD: Adds the contents of the source and destination register and stores result in destination register AD (a,b).

SB: Subtracts the contents of the source and destination register and stores the result in destination register SB (a,b).

AN: Forms the bitwise and of the contents of the source and destination register and stores the result in destination register AN (a,b).

NT: Forms the bitwise complement of the contents of the source register and stores the result in destination register NT (a,b)

RD: Fetches a memory word from the location specified by the second byte and loads the result into destination register. Source register bits are unused.

WR: Writes the contents of the source register to the word in memory specified by the address held in second byte. Destination register bits are unused.



Figure (4.3): RTL Diagram of Arithmetic & Logic Unit


The D Flip-Flop follows the input, making transitions with match of the input D. The D stands for "data". D Flip-Flop stores the value that is on the data line. A D-Flip-Flop can be made from a set/reset Flip-Flop by tying the set to the reset through an inverter. The result may be clocked.

Figure (4.4): Block Diagram of D Flip Flop

A D Flip-Flop is generally controlled by one or two control signals and/or a gate or clock signal. The output often includes the complement as well as the normal output. The edge-triggered D Flip-Flop is easily obtained from its RS complement. The only requirement is to replace the 'R' input with an inverted of the 'S' input, which thereby becomes D. This is only needed in the master latch section; the slave remains unchanged.


When the clock input comes to logic 0 and the outputs can change state, the Q output takes on the state of the D input at the moment of the clock edge. This was not true of the RS and JK flip-flops. The RS master section would continually change states to match the input signals while the clock line is logic 1, and the Q output would reflect either input most recently received an active signal.

Edge-triggered D NAND flip-flop

Figure (4.5): Clocked D Flip Flop using JK Flip Flop



Figure (4.6): Nand Gate Clocked D Flip Flop


Input Q

Output 1 D

Output 2 Q (t+1)
















A circuit that holds the addresses of data to be processes or of the next instruction register


The different types of Address Registers are as follows:-

1. MAR stands for Memory Address Register, MAR is a parallel load register that contains the memory address to be manipulated next.

2. DMAR is the destination memory address register.

3. SMAR is the source mf5tf5fgyrvemory address register.

MAR holds the address of a memory location, but not necessarily just the instructions. It holds the memory location of data that needs to be accessed. That data is then fed in to the MDR (memory data register) and can be used.


Figure (4.7): Block Diagram Of Address Register



Figure (4.8): RTL Diagram of Address Register


The Instruction Register (IR) stores the instruction currently being executed. In simple processors every instruction which is to be executed is loaded into the instruction register which holds it while it is decoded, prepared and executed.

An instruction is normally made up of a combination of an op-code and some way of specifying an operand, most commonly by its location or address in memory though no memory reference instructions can exist. Some op-codes deal with more than one operand, the locations of these operands may be specified using any of the many addressing schemes. The number of address references has been used to specify something about the architecture of a particular computer. In some instruction formats and machine architectures, the number of operand references may be fixed. In others the number is variable. In the former case descriptions of formats include one-address, two-address, three-address, and four-address.

An example of a one-address instruction is

add x

add contents of address x.

to contents of accumulator.

sum remains in accumulator.

Instruction Register holds the instruction. Instruction register is the part of a CPU's control unit that stores the instruction currently being executed. In simple processors each instruction to be executed is loaded into the instruction register which holds it while it is decoded, prepared and ultimately executed, which takes several steps. More complex processors use pipeline of instruction registers where each stage of the pipeline does part of the decoding, preparation or execution and then passes it to the next stage. Modern processors can even do some of the steps \as decoding on several instructions is done in parallel. Decoding the opcode in the instruction register includes determining the instruction, determining where its operands are in memory, fetching the operands from memory, allowing processor resources to execute the command etc. it holds the instruction and tells what instruction to be executed.


Figure (4.9): Block Diagram of Instruction Register


The time period during which one instruction is fetched from memory and executed, when a computer is given an instruction in machine language. There are typically four stages of an instruction cycle that the CPU carries out

1. Fetch the instruction from memory. This step brings the instruction into the instruction register, a circuit that holds the instruction so that it can be decoded and executed.

2. Decode the instruction.

3. Read the effective address from memory if the instruction has an indirect address.

4. Execute the instruction.

Steps 1 and 2 are called the fetch cycle and are the same for each instruction. Steps 3 and 4 are called the execute cycle and will change with each instruction. An instruction cycle also is called machine cycle.


Figure (4.10): RTL Diagram of Instruction Register

Fig (4.10) shows the RTL of an instruction register in which we have four inputs and one output. Dt_in and dt-ot are 8 bit words. Dt_in is an input data and dt-out is the output data.


Program counter (PC) is a 13-bit register that contains the address of the instruction currently being executed. It is physically carried out as a combination of a 5-bit register for the five higher bits of the address, and the 8-bit register for the lower 8 bits of the address. By its incrementing or change (i.e. in case of jumps) microcontroller executes program instructions step-by-step.

Processor register (or general purpose register) is a small amount of storage available on the CPU whose contents can be accessed more quickly than storage available elsewhere. Typically, this specialized storage is not considered part of the normal memory range for the machine. Most, but not all, modern computers adopt the so-called load-store architecture. Under this paradigm data is 'shuffled' from subordinated into registers, running instructions from the instruction set, then transferred out. A common property of computer programs is that the same values are often accessed repeatedly; and holding these frequently used values in registers improves program execution performance.

It's used to keep track of current execution point. This is necessary for various reasons and some of these reasons are

1. While branching or looping destination address is specified with respect to the current PC value.

2. While branching to a function call current Pc value is pushed into the stack and retrieved back when returning from the function-call.

3. PC value is stored when servicing an interrupt and restored back.


Figure (4.11): Block Diagram of Instruction Register


The central processing unit of a simple computer contains the hardware that executes the instructions, as they are fetched from the memory unit. Most instruction cycles consist of the CPU sending an address, on the address bus, to the memory unit, which then responds by sending the contents of that memory location as data, on the data bus. The Program Counter (PC) is just one of the many registers in the hardware of the CPU. It, like each of the other registers, consists of a bank of binary latches. In the case of the PC, the integer represents the address in the memory unit that is to be fetched next.

Once the data (the instruction) has been received on the data bus, the PC is incremented. In some CPUs this is achieved by adding 000..001 to its contents, and latching the result into the register to be its new contents, on most CPUs, the PC is implemented as a register that is internally wired so that it counts up to the next value when a specific signal is applied to it externally. Such a register, in electronics, is referred to as a binary counter, and hence the origin of the term program counters. Once the PC is reset, the pointer comes to the first location that is 00h.

Figure (4.12): Block Diagram of Program Counter


Figure (4.13): RTL Diagram of Program Counter

Fig (4.13) shows the RTL of a program counter in which we have five inputs and one output. Dt_in and dt-ot are 8 bit words. Dt_in is an input data and dt-out is the output data


A multiplexer or MUX is a device that performs multiplexing, it selects one of many analog / digital input signals and forwards the selected input into a single line. A multiplexer of 2n inputs has n select lines, which are used to select which input line to send to the output. An multiplexer makes it possible for several signals to share one device or resource, for example one A/D converter or one communication line, instead of having one device per input signal. A multiplexer can be considered as a multiple-input, single-output switch. In telecommunications, a multiplexer is a device that combines several input information signals into one output signal, which carries several communication channels, by means of some multiplex technique. One use for multiplexers is cost savings by connecting a multiplexer.



Figure (4.14): RTL Diagram of Multiplexer


A multiplexer breaks large amounts of data into smaller chunks so that the processor can manipulate it more easily and give back the processed data in pieces when it finishes processing it. A multiplexer is used to combine multiple data streams into a single data stream. Multiplexers serve as a useful purpose in logic design. They can connect two or more sources to a single logic design. MUX has multiple input signals with one output switch. They can connect two or more resources to a single destination, used to implement Boolean functions, Selectors s0, s1 gives the combinational logic in binary form and used to select any logic.



Select Output















Don't care/ Unknown logic value

In our design we have two multiplexers:

* A 5-channel, multiplexer_5ch, called as MUX-1.

* A 3-channel mulateplexer_3ch, called as MUX-2.

Mux-1 determines the source of the data bound for bus-1, with less number of inputs as compared to MUX-2, and a second MUX-2 determines the source of the data bound for bus-2. The output of the MUX-1 is used as an input of MUX-2.


Figure (4.15): RTL Diagram of 3 Channel Multiplexer

Fig (4.15) shows the RTL of a 3 channel multiplexer. It has three inputs of 8 bits dt_a, dt_b, dt_c and a two bit selector, 8 bit output mux_ot. The inputs data paths to MUX-2 are from ALU, memory and MUX-2.


Figure (4.16): RTL Diagram of 5 Channel Multiplexer

Fig (4.16) shows the RTL of a 5 channel multiplexer. It has five inputs of 8 bits dt_a, dt_b, dt_c dt_d, dt_e and a three bit selector, 8 bit output mux_ot. The inputs data paths to MUX-2 are from four internal registers (R0, R1, R2, R3) and from the PC.


A register is a small amount fast memory that is built into the CPU (central processing unit) in order to increase the speed of its operations by providing speedy access to commonly used values.

Registers are of two types, general purpose and special purpose. The general purpose register provides temporary holding place for data that is being manipulated by the CPU. That is, they hold the inputs to the arithmetic / logic circuit and store the results by that circuit. Special purpose registers store internal CPU data, such as the program counter (also termed instruction pointer), stack pointer and status register.

Most commonly registers are implemented as an array of SRAM) cells. SRAM (static random access memory is a type of RAM that is much faster and more reliable than the DRAM (dynamic random access memory), which is used for main memory because of its lower cost and tiny space consumption

Registers are measured by number of bits they can hold e.g an 8-bit register or a 16-bit register. However, CPU that implement this instruction set generally contain more registers than just these eight, including various special types. An instruction set is the aspects of computer architecture, including the inhabitant data types, instructions, registers, addressing modes, memory architecture, interrupt, exception handling and external input/output. The following are the details of registers used for storage of different data in design of microcontroller architecture.

* R0 (General Purpose Registers GPRs)

* R1 (GPRs)

* R2 (GPRs)

* R3 (GPRs)

* Reg Y ( Stores data for ALU)

* Reg Z ( When output of ALU is zero)



Figure (4.17): RTL Diagram of Register unit




This chapter includes design details of control unit, memory unit. It also includes the descriptions about I/O ports, timers, instructions sets, and which architectural design we used in our project.


The control unit of a machine is basically central part that controls the whole function of a machine, such that machine is enough organized to control such a unit. Control unit controls the flow of information through processor and also coordinates with the activities of other units with it. In simple language we can call it 'brain within a brain' as it controls what happens inside the processor, which further controls the rest of PC. It is a typical component of the CPU that implements the microprocessor instruction set. It extracts instructions from memory and decodes and executes them, and sends the necessary signals to the ALU to perform the operation needed.

Machine performs following operation:

* Fetching an instruction from memory;

* Decoding the instruction;

* Transferring the data;

* Executing the instruction.

Fetching retrieves an instruction from memory, decoding decodes the instruction, manipulates data paths and loads registers; execution generates the result of the instructions. Fetching phase requires two cycles one to Load address register and second to retrieve the addressed word from memory. Decode phase is completed in one cycle. Execution phase may require no cycle or one, two three cycles according to the instruction. There are single byte instructions and two byte instructions.


NT: Instruction is completed in same cycle that the instruction is decoded.

AD: Instruction requires one cycle to execute, during which results are loaded into the destination register.

RD: Instruction requires two cycles to execute, one to load address register with the second byte, and one to retrieve word from the memory location addressed by the second byte and load into destination register.


In this project we are making RISC (Reduced Instruction Set Computer) microcontroller. It is a type of architecture that uses a small and optimized set of instruction rather than more complex instruction set.

Here are different characteristic features of RISC microprocessors given below:

Pipelining: A technique that allows the simultaneous execution of parts, stages, of instructions which results in more efficient process.

Large Number of Registers: The RISC processors are designed in such a way that they incorporates a larger number of registers to prevent in large amounts of interactions with memory.

4.1.2. WORKING

The controller of a RISC has 11 states described below with control actions that occur in each state:

S_idle: State entered after the reset is asserted. No action.

S_fet1: Load the address register with the contents of the program counter. The state is entered after the 1st active clock after reset is de asserted and is revisited after a NOP instruction is decoded.

S_fet2: Load the instruction register with the word addressed by the address register and increment the program counter to point to the next location in memory in anticipation of the next instruction or data fetch.

S_dec: Decode the instruction register and assert signals to control data paths and register transfer.

S_ex1: Execute the ALU operations for a single byte instruction, conditionally assert the zero flag and load the destination register.

S_rd1: Load the address register with the second byte of a RD instruction and increment the PC.

S_rd2: Load the destination register with the memory word addressed by the byte loaded in S_rd1.

S_wr1: Load the address register with the second byte of a WR instruction and increment the PC.

S_wr2: Load the address register with the memory word addressed by the byte loaded in S_wr1.

S-br1: Load the address register with the second byte of a BR instruction and increment the PC.

S_br2: Load the address register with the memory word addressed by the byte loaded in S_wr1.

S_halt: Default state to trap failure to decode a valid instruction.

The control unit is large but its design is simple and its development follows from the flow graphs shown below. The control unit has registers, buses, multiplexers, instructions, ports and variables in it. First the ports and variables are declared and then data path multiplexers are described using conditional operators. Two cyclic behaviors are used:

* A level sensitive behaviour (Describes the combinational logic of outputs and next state)

* An edge sensitive behaviour (Synchronizes the clock transitions.)

The following is the table of the signals and their resultant actions that are generated by the control unit.

Control Signal



Loads the address register


Loads Bus_2 to the PC


Loads Bus_2 to the IR


Increment to the PC


Selects among PC,R0,R1,R2,R3 to drive Bus_1


Select amongs Alu_ot, Bus_1, and memory to drive Bus_2


Loads general purpose register R0


Loads general purpose register R1


Loads general purpose register R2


Loads general purpose register R3


Loads Bus_2 to the register Reg_Y


Stores output of ALU in register ZReg_Z


Loads Bus_1 into the memory at location specified by the address register.


control unit

Figure (5.1): RTL Of Control Unit


Memory unit is the storage part of the computer. The data and instructions that the computer needs at a specific moment are stored there. Electromechanical Relays, Mercury-filled tubes and Transistors are the basic type of memories which were earlier used. These days the memory has taken the form of a Silicon chip. The memory unit of a computer is storage of instructions which are being entered in the computer. The main purpose of the storage of these instructions is that they'll be available when required; also they can be used again and again without the need to input them from an input device. These days Memory units are measured in gigabytes. The usual computer may have a memory unit of 1 GB, 2 GB or more. In our design we are using 256 bytes of memory.


The following are the type of memories which are used

* A primary memory also known as random access memory (RAM), which is temporary storage of data.

* A secondary memory also knows as read-only memory (ROM), which is permanent storage of data.


Figure 5.3 shows the RTL diagram of memory unit. The memory unit in our design is made up of D-type of flip flops. From the memory we can read or write data when ever needed. The reading of data is done is the following manner.


To read the data from the memory the write control signal is disabled (0), the address of the memory location is given from which we want to read the data, the data is then steered out of the memory unit.


To write data to the memory the write control signal is enabled (1), the address of the memory location is given to which we want to write data, the data is then steered to writing location of the memory as described the address.

4.3. I/O PORTS

I/O is the keyword for Input and Output. A simple keyboard or a keypad is the most common input device. When we use keyboard such a way that we type this means that data or information is being fed to the computer, which is known as input. A monitor is among most common output device used. The information which was fed to the computer can be seen by the output device i.e. monitor. In simple words the I/O ports enables the computer to interact with the external world. The I/O ports we used in our project are P0, P1, P2, P3.


Timers are the special type of clock's in microcontroller architecture's. with the help of these timers a sequence of a process can be controlled. A timer can count up or down from a specified time interval. Timers can be mechanical, electromechanical, electronic or even software as all modern computers include digital timers of one kind or another. There are different ICs also used for the timers. e.g. 555 timer IC, an integrated circuit implementing a variety of timer applications.

A timer can be used in either of the two ways.

* To perform a task once, after a delay.

* To perform a task repeatedly.


The microcontroller we have designed is controlled by a machine language program. This language program consists of a set of instructions which is stored in the memory unit. Our microcontroller design depends upon the instruction set as well as the machines architecture. The machine language program consists of an 8 bit stored words, also known as bytes. The format of an instruction can be long or short.


Short instructions have the format as shown in the figure (5.3). Each of the short instruction requires 1 byte of memory. In 1 byte, the 4 bits are allocated to the opcode, 2 bits are for the source register and the remaining 2 bits are for the destination register






Long instructions have the format as shown in the figure (5.4). Each of the long instruction requires 2 byte of memory. In 2 bytes, the 4 bits are allocated to the opcode, 2 bits are for the source registers, 2 bits are for the destination register and the remaining 8 bits contain the address of the memory word that holds an operand required by the instruction.

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