ADVANCES IN X-RAY COMPUTED TOMOGRAPHY FOR FAILURE ANALYSIS
Due to miniaturization of CMOS devices, an advanced high definition imaging techniques are essential to improve the enhancement of CMOS processes. X-ray computed tomography is one of the advanced X-ray techniques used for failure analysis of advanced IC packaging.
Definition: "ComputedTomography(CT) is a powerful non-destructive evaluation (NDE) technique for producing 2-D and 3-D cross-sectional images of an object from flat X-ray images. Characteristics of the internal structure of an object such as dimensions, shape, internal defects, and density are readily available from CT images".
Advantages of X-ray radiation:
- High energy x rays have very large penetration length to image internal structures of a IC device without deprocessing.
- The absorption and fluorescence emission depends strongly on the elemental composition of the sample, allowing high-sensitivity material analysis.
- X-ray imaging causes little structural damage to integrated circuit samples and there is no charging effect.
X-ray Computed Tomography for failure analysis:
X-ray technology inspects the IC in depth and a simple x-ray system basically produces only a 2-D image of the sample. When an X-ray system combined with Computed Tomography it is possible to produce a 3-D image of a sample.
The sample i.e. an IC under test is placed under the X-ray source (shown in Fig. 1.1) and the scanned image of IC is detected by a high definition camera. The image what we get here is just a 2-D image at certain point of IC. So a CT technology is added here so as to get the 3-D image. Here the sample is allowed to rotate in a single axis (shown in Fig. 1.2) and based on a large number of X-ray images captured around a single axis of rotation CT reconstructs an accurate 3-D image of the IC. With this 3-D image, it is obvious to analyse an IC in-depth in order to do a failure analysis.
Referring to the IEEE paper(indicated in References), the failure analysis of 3D integrated circuits (IC) has become new challenges to existing technologies, especially with the essence of non-destructively test of sample. X-ray microscopy gives a resolution better than 50 nm and ability to differentiate different elemental compositions. When combined with computed tomography (CT) technology, the full 3D structure of an IC can be obtained non-destructively at tens of nanometer accuracy. A typical high-resolution x-ray imaging system is shown in Fig. 1.3.
Recent developments in x-ray optics and detector technology have dramatically improved both resolution and throughput of x-ray microscopy. Until today upto 25 nm resolution has been demonstrated with synchrotron radiation sources, and Xradia, Inc. has developed laboratory-based systems that can routinely achieve 50 nm resolution in 3D imaging.
The x-ray CT approach offers many important fundamental advantages for Failure Analysis:
- Non-destructive 3D volumetric metrology on vertical walls, semi-closed, or even completely embedded structures;
- Virtually no measurement distortion;
- At 50 nm resolution, it provides up to parts-in-thousands geometric accuracy; and
- Suitable for wide range of materials from polymers to metal with no charging effect or negligible radiation damage.
What defects we can view using X-ray CT:
- 3D structure of the void
- Solder ball/bump voids and cracks
- Die attach voids and delamination
- Trace shorts and opens
- Via cracks and opens
- Wirebond shorts and opens
- Solder reflow defects
- Void volume connectivity
- 3D surface profile and etc.
Approaches in increasing demanding imagingresolutionof X-ray CT are
- reduction in the x-ray spot size
- use of higherresolutiondetectors or
- employment of x-ray optical elements
Energy-tunable, Ultra-high Resolution 3D X-ray Microscopy For Synchrotron Facilities - a typical example:
The nanoXCT-S100(a product of Xradia Inc.) is an ultra-high resolution 3D X-ray Microscopy for synchrotron facilities. This product will produce 3D images with sub-40 nm resolution. An option of tunability of X-ray photon energies enables spectroscopic imaging for elemental contrast and chemical state mapping. This product finds its main application in semiconductor package failure analysis. The schematic diagram of this product is shown in Fig. 1.4.
An incident x-rays from synchrotron source are focused onto the sample. The sample is illuminated at this point at which the rays begin to diverge. At 20 mm past the sample position, a zone plate objective called a Fresnel zone plate captures the diverging rays and focuses the image of the sample. The x-rays are then converted to an image by a scintillating crystal. A high-resolution CCD camera (detector) is used to capture the 3-D image.
- "Metrologyof3DICwithX-rayMicroscopyandnano-scaleX-rayCT", Wang, S.; Gelb, J.; Lau, S.H.; Wenbing Yun;Interconnect Technology Conference, 2009.
- "Sub-micron resolution CT for failure analysis and process development", M Feser, J Gelb, H Chang, H Cui, F Duewer, S H Lau, A Tkachuk and W Yun; IOP publishing, 2008.
An IC is tested for reliability using High Temperature Bias test at three different temperatures:
Median rank can be calculated by, Median rank = (Rank - 0.3) / (Total devices tested + 0.4)
Now the data is plotted in the Weibull paper, corresponding values of a and b can be calculated from the Weibull plot.
Using a and b we can calculate the reliability of the IC after 3 and 5 years.
At 40C, we can calculate the value of ln a using the FORECAST function in excel sheet, which is 11.51288. From this the value of a can be calculated as, a = 99995.45.
b value is taken as 1.48, which is the average of the three b values in the table.
Reliability can be estimated by using the following formula.
Reliability, Rt = exp - (t / a) b
Reliability of IC after 3 years at 40C:
Rt = exp - ((3 * 8760) / 99995.45) 1.48
Therefore, reliability of IC after 3 years is, Rt = 0.87076
Reliability of IC after 5 years at 40C:
Rt = exp - ((5 * 8760) / 99995.45) 1.48
Therefore, reliability of IC after 5 years is, Rt = 0.74473
We can find the slope by plotting ln ? vs 1 / T. From the slope we can calculate the activation energy.
Activation energy = slope * k
Where k -> Boltzman Constant = 8.6174 x E-5 eV K-1
Slope is calculated 7048. Therefore activation energy is calculated as 0.6eV.
Activation Energy = 0.6eV
ln a at 60C can be calculated using the FORECAST function in excel sheet, which is 10.31155. From this ? is calculated as 30078.02
Reliability, Rt = exp - (t / a) b
We have to calculate the reliability after 3 and 5 years. [*1 year = 8760 hours ]
In order to calculate the reliability, we have to calculate the acceleration factor.
Acceleration factor, AF = exp ((Ea / k)(1 / Tu - 1 / Tt))
Given activation energy is 0.6eV, k is the Boltzmann constant which is 8.62E-5, Tu is the use temperature which is 40C or 313K and Tt is the test temperature which is 60C or 333K. From this the acceleration factor is calculated as 8.2414.
AF = exp((0.6/8.62xE-5)[1/313 - 1/333]
Acceleration Factor AF = 3.80
Assuming that the memory chip has the reliability of 100 FITS at 400C. One FIT is failure per billion device hours. 100 FITS is equal 10-7. From this the failure rate can be estimated. Reliability of memory IC's can be calculated from the failure rate.
Reliability of 4 memory IC's after 3years can be calculated by the following method.
Failure rate = E-7 * 3 * 8760 * 3.80 = 0.009864
1 - Failure rate = 1 - 0.009864= 0.99
Reliability of 4 memory IC's after 3 years = (0.99)4 = 0.9606
Reliability of 4 memory IC's after 5 years can be calculated by the following method.
Failure rate = E-7 * 5* 8760 * 3.80 = 0.016644
1 - Failure rate = 1 - 0.016644= 0.9833
Reliability of 4 memory IC's after 5 years = (0.9833)4 = 0.9350
Overall reliability of the module after 3 years = Reliability of 4 memory IC's after 3 years * Reliability of IC after 3 years at 40C.
Therefore, overall reliability of the module after 3 years = 0.9606* 0.87076 = 0.8363.
Overall reliability of the module after 10 years = Reliability of 4 memory IC's after 5 years * Reliability of IC after 5 years at 40C.
Therefore, overall reliability of the module after 5 years = 0.9350* 0.74473 = 0.6962.
A 300 mm diameter wafer goes through the following 6 process steps:
If the chip size is 12 mm square and assuming 100% chip coverage, calculate the yield at each stage of the process and the overall yield (a) using the Poisson distribution (no clustering) and (b) using the negative binomial model with clustering. Show your calculations.
Diameter of the wafer, d = 300 mm
Radius of the wafer, r = d/2 = 150 mm
Area of the wafer, Aw = ?r2 = 70685.835 mm2
Side of the square chip, a = 12 mm
Area of a chip, Ac = a2 = 144 mm2
Since we have 100% chip coverage,
No. of chips/wafer = Aw/Ac = 490 (approx)
ADVANCED X-RAY BASED METROLOGY TOOLS
There are many X-ray based metrology methods to monitor critical 65 and 45 nm processes. The processes include ion implant, nitrided SiO2 gate dielectrics, NiSi, Cu/porous low-? interconnects and MIM capacitors. Nowadays the use of new materials other than conventional silicon-based materials are keep on increasing and hence requiring new and advanced metrology tools to improve enhancement of wafer fabrication.
To monitor the manufacturing of microelectronic processes there are many x-ray metrology tools in exist. Some of them are:
- X-Ray Fluorescence (XRF)
- X-Ray Reflectivity (XRR)
- Grazing Incidence Small Angle X-Ray Scattering (GI-SAXS)
- X-Ray Photoelectron Spectroscopy (XPS)
- X-Ray Diffraction (XRD)
- X-Ray Diffraction Topography (XRT)
So combinations of these X-ray techniques are essential in monitoring the whole manufacturing process.
Let's take a look on X-Ray Reflectivity (XRR) method which is especially used in monitoring NiSi formation from Ni deposition which is extremely critical for the integration of nickel silicide in 65 nm node.
X-RAY REFLECTIVITY (XRR) :
X-ray reflectivity is a non-destructive, routine technique, used for estimation of density, thickness and roughness of thin film structures. The tool works based on total external reflection of X-rays from surfaces and interfaces. And it can be used with amorphous, crystalline and liquid samples.
The basic principle that the system is working is to reflect a beam ofx-raysfrom a flat surface and then measuring the intensity of x-rays reflected in the specular direction (reflected angle equal to incident angle). If the interface is not perfectly sharp and smooth then the reflected intensity will deviate from that predicted by the law ofFresnel reflectivity. The deviations are analyzed to obtain the density profile of the interface normal to the surface. A typical measurement setup is shown in Fig. 4.1.
According to law of Fresnel reflectivity, the intensity leaving a smooth surface decreases very rapidly on increasing the angle of incidence. Since XRR requires recording reflected intensity over 5-6 orders of magnitude, highly intense X-ray source and detector with low noise are needed.
In order to measure the angles accurately, thus to minimize error in the results, the rotational axis of the sample circle (?-circle) has to be aligned exactly with the sample surface. By using a knife-edge very close to the axis of sample rotation i.e. to the sample surface, only those beams leaving the sample surface directly below the knife-edge arrive at detector.
AN EXAMPLE: X-RAY METROLOGY (XRR) OF NISI THIN FILMS
NiSi films are used to reduce the overall contact resistance between the silicon part of MOS transistors and the Cu interconnects. NiSi has advantages compared to the commonly used silicides like TiSi2 and CoSi2. Some advantages are:
- NiSi formation occurs at low temperatures around 400 C
- NiSi thermal stability, in particular when NiSi is doped with platinum
- Formation of abrupt interfaces with Si
- low Si consumption and
- very low line width dependence of its resistivity.
INTEGRATION OF NISI IN A 65 NM CMOS PROCESS
The contrast between the electron densities of the various nickel silicide phases are very large (as shown in Table 4.1) and so X-Ray Reflectivity (XRR) is very well suited and, probably, the fastest available metrology technique to monitor the formation kinetics, the thickness and the thermal stability of NiSi films.
At low temperatures (Fig. 4.3a), the Ni2Si phase is present with a density of 7.9 g/cm3, which is slightly higher than the 7.4 g/cm3 value reported in the JCPDS file. This slightly higher Ni2Si density value can be explained by an incomplete phase transformation due to the very low thermal budget.
At intermediate temperatures, typically between 350 ?C and 450 ?C (Fig. 4.3b), the model describes a stack having a bottom NiSi layer with a measured density ?6 g/cm3 (in good agreement with JCPDS file information for NiSi) and a top Ni2Si layer with a temperature-dependent density. When these two phases co-exist, the total thickness of the silicide film can be calculated as the sum of the NiSi thickness and the "density-weighted" Ni2Si thickness, as given by the XRR model.
At 450 ?C (Fig. 4.3c), the nickel silicide film is completely transformed into NiSi, and the XRR model reveals a thick NiSi layer and a thin (2.4 nm) top oxidized layer (d ? 5.3 g/cm3).
From the result it is obvious to know that it shows an accurate and reliable measurement of the NiSi film thickness as a function of annealing temperature, and showed a good correlation between the thickness and the electrical properties of the silicide.
Note : JCPDS - Joint Committee on Powder
- "X-ray metrology for advanced microelectronics", C. Wyon, The European Physical Journal, Applied physics, 2010