# Space Vector Pulse Width Modulation

### 3.1 Introduction

Three-level inverter topology being widely used in high voltage/high power applications due to its high voltage handling and good harmonic rejection capabilities with currently available power devices. The three-level inverter roughly has four times better in harmonic content compared with two-level topology. The harmonic contents of the output voltage are fewer than those of two-level inverter at the same switching frequency. In addition blocking voltage of each switching device is a half of the DC link voltage, it is easy to realize high voltage and large capacity inverter system.

In this chapter, at first the space vector pulse width modulation (SVPWM) algorithm for a three-level inverter fed induction motor is presented and analyzed, then a novel approach for generation of space vector PWM for multilevel inverter based on fractals has been proposed and applied for three-level and five-level inverters. The first proposed SVPWM algorithm provides high safety voltages with less harmonic components compared to two-level structures and reduces the switching losses by limiting the switching to two thirds of the pulse duty cycle. The voltage vector selection procedure, switching time calculation and switching pattern generation for three-level inverter are described in detail. This space vector pulse width modulation algorithm contributed for the reduction of switching power losses and proved the advantages of three-level inverter that carryout voltage with contents of less harmonic injection than two-level inverter. The proposed method can be applied to the multilevel inverters above the three-level. But as the level of inverter increases, the sector identification and switching vector determination and dwelling time calculation becomes more complex. The computational complexity and the execution time increases.

The second proposed method for the generation of space vector PWM for multilevel inverter based on fractals reduces the algorithm complexity and execution time. This SVPWM method using the fractal approach is motivated from the fact that the switching vector representation of any multilevel inverter has an inherent fractal structure, with the basic unit of this structure being the triangle made of the vertices of three adjacent inverter voltage space vectors. As the number of levels increases, it can be viewed that, each sector gets further divided into smaller triangular regions or sectors.

The present work is pivoted on this idea, and an algorithm is also proposed for generating the sectors of higher level inverter from the triangular regions of an equivalent two-level inverter. The proposed method uses simple arithmetic for determining the sector and does not require look up tables, hence fractal approach is applied for multilevel inverters using SVPWM. The implementation of space vector pulse width modulation involves

(i) Identification of the sector in which the tip of the reference vector lies.

(ii) Determination of the three nearest voltage space vectors.

(iii) Determination of the duration of each of these switching voltage space vectors.

(iv) Choosing an optimized switching sequence.

The sector identification can be done by using coordinate transformation of the reference vector into a two dimensional coordinate system. The sector can also be determined by resolving the reference phase vector along a, b and c axes and by repeated comparison with discrete phase voltages. After identifying the sector, the voltage vectors at the vertices of the sector are to be determined. Once the switching voltage space vectors are determined the switching sequences can be obtained. The calculation of the duration of the voltage vectors can be simplified by mapping the identified sector to corresponding to a sector of two-level inverter. To obtain optimum switching, the voltage vectors are to be switched for their respective durations, in a sequence such that only one switching occurs as the inverter moves from one switching state to another. Conventional techniques involve look up tables for achieving this optimum switching sequence.

### 3.2 Space Vector Pulse Width Modulation for Three-level Inverter

3.2.1 Three-level Inverter Topology and Switching states: 3.1 shows a schematic diagram of a three-level inverter. Each phase of the inverter consists of two clamping diodes, four IGBTs and four free wheeling diodes. Since three kinds of switching states and terminal voltages exist in each phase, the three-level inverter has 27(33) switching states. 3.2 shows the representation of the space voltage vectors for output voltage and the space vector diagram of all switching states, where the P, O, N represent terminal voltage respectively, that is Vdc/2, 0, -Vdc/2. According to the magnitude of the voltage vectors, we divide them in to four groups; zero voltage vector (V0), small voltage vectors (V1, V4, V7, V10, V13, V16), middle voltage vectors (V3, V6, V9, V12, V15, V18) and large voltage vector (V2, V5, V8, V11, V14, V17). The zero voltage vector (ZVV) has three switching states, small voltage vector (SVV) has two switching states, the middle voltage vector (MVV) and large voltage vector (LVV) have only one switching state.

### Table 3.1 Switching states of three-level inverter.

Switching Symbols

Switching Conditions

Output Voltage (Vao)

S11

S12

S13

S14

P

ON

ON

OFF

OFF

+Vdc/2

O

OFF

ON

ON

OFF

0

N

OFF

OFF

ON

ON

-Vdc/2

### 3.2.1.1 Voltage Vector and Calculation of Switching Time Duration

3.3 shows the triangle formed by the voltage vectors V0, V2 and V5. This triangle is divided into four small triangles 1, 2, 3 and 4. In the space voltage vector PWM, generally, output voltage vector is formed by its nearest three vectors in order to minimize the harmonic components of the output voltage and the current. The duration of each vector can be calculated by vector calculation. For instance, if the reference voltage vector falls into the triangle 3, the duration of each voltage vector can be calculated by the following equations.

(3.1)

(3.2)

(3.3)

Substituting Eq. (3.3) in Eq. (3.1) and changing in to trigonometric form

(3.4)

Separating real and imaginary parts from Eq. (3.4)

(3.5)

(3.6)

Ta, Tb and Tc can be calculated by solving Eq. (3.2), Eq. (3.5) and Eq. (3.6)

(3.7)

(3.8)

(3.9)

Where

In other regions (1, 2, 4), the duration for each voltage vector can be calculated in the same way. Table 3.2 shows the switching time durations of voltage vector in section-I.

### Table 3.2 Voltage vector duration.

Region

Ta

Tb

Tc

1

2kTs sin(60-θ)

Ts[1-2ksin(θ+60)]

2kTs sin(60-θ)

2

2Ts[1-ksin(θ+60)]

2kTs sinθ

Ts[2ksin(60-θ)-1]

3

Ts[1-2ksinθ]

Ts[2ksin(θ+60)-1]

Ts[2ksin(θ-60)+1]

4

Ts[2ksinθ-1]

2kTs sin(60-θ)

2Ts[1-ksin(θ+60)]

### 3.2.1.2 Switching Pattern Generation Considering Minimum On/Off Time

No. of samples = 48

SECTION

SAMPLES

STATES

SWITCHING STATES

1.2

1

5-17-16-4

POO-PON-PNN-ONN

2

4-16-17-5

0NN-PNN-PON-POO

3

5-17-16-4

POO-PON-PNN-ONN

1.3

4

4-7-17-5

0NN-OON-PON-POO

1.4

5

6-18-17-7

PPO-PPN-PON-OON

6

7-17-18-6

OON-PON-PPN-PPO

7

6-18-17-7

PPO-PPN-PON-OON

8

7-17-18-6

OON-PON-PPN-PPO

2.2

9

6-18-19-7

PPO-PPN-OPN-OON

10

7-19-18-6

OON-OPN-PPN-PPO

11

6-18-19-7

PPO-PPN-OPN-OON

2.3

12

9-19-7-8

OPO-OPN-OON-NON

2.4

13

9-19-20-8

OPO-OPN-NPN-NON

14

8-20-19-9

NON-NPN-OPN-OPO

15

9-19-20-8

OPO-OPN-NPN-NON

16

8-20-19-9

NON-NPN-OPN-OPO

3.2

17

9-21-20-8

OPO-NPO-NPN-NON

18

8-20-21-9

NON-NPN-NPO-OPO

19

9-21-20-8

OPO-NPO-NPN-NON

3.3

20

11-8-21-10

NOO-NON-NPO-OPP

3.4

21

5-17-16-4

OPP-NPP-NPO-NOO

22

4-16-17-5

NOO-NPO-NPP-OPP

23

5-17-16-4

OPP-NPP-NPO-NOO

24

4-16-17-5

NOO-NPO-NPP-OPP

4.2

25

10-22-23-11

OPP-NPP-NOP-NOO

26

11-23-22-10

NOO-NOP-NNP-OPP

27

10-22-23-11

OPP-NPP-NOP-NOO

4.3

28

12-23-11-13

OPP-NOP-NOO-NNO

4.4

29

12-23-24-13

OPP-NOP-NNP-NNO

30

13-24-23-12

NNO-NNP-NOP-OPP

31

12-23-24-13

OPP-NOP-NNP-NNO

32

13-24-23-12

NNO-NNP-NOP-OPP

5.2

33

12-25-24-13

OOP-ONP-NNP-NNO

34

13-24-25-12

NNO-NNP-ONP-OOP

35

12-25-24-13

OOP-ONP-NNP-NNO

5.3

36

12-25-15-13

OOP-ONP-ONO-NNO

5.4

37

14-26-25-15

POP-PNP-ONP-ONO

38

15-25-26-14

ONO-ONP-PNP-POP

39

14-26-25-15

POP-PNP-ONP-ONO

40

15-25-26-14

ONO-ONP-PNP-POP

6.2

41

14-26-27-15

POP-PNP-PNO-ONO

42

15-27-26-14

ONO-PNO-PNP-POP

43

14-26-27-15

POP-PNP-PNO-ONO

6.3

44

5-27-15-4

POO-PNO-ONO-ONN

6.4

45

5-27-16-4

POO-PNO-NPO-NOO

46

4-16-27-5

NOO-NPO-PNO-POO

47

5-27-16-4

POO-PNO-NPO-NOO

48

4-16-27-5

NOO-NPO-PNO-POO

### 3.2.3 Results and Discussions

Simulation was carried out for two level and three level inverter fed induction motor. The parameters of induction motor used for simulation are as follows:

220V, 50Hz, 4 pole, 3HP,

Rs=0.55ohms, Ls=93.38 mH,

Rr=0.78ohms, Lr=93.36mH, Lm=90.5mH,

J=0.019 Kg-m2, B=0.000051, TL=10.32N-m

Data for induction motor model

Rr=.78;

Rs=0.55;

Ls=.09338;

Lr=.09336;

Lm=.0905;

M=.0905;

J=.019;

p=4;

B=.000051;

Tr=Lr/Rr;

sigma=Ls-(M*M)/(Lr);

Kps=.554;

Kis=8.32;

Kp=6.38;

Ki=2078;

Kphi=200;

Ktheta=5.15;

Iphi=5.87;

delIphi=.587;

Tl=10.32;

wd=4*pi;

idsref=5.87;

wref=1800*2/p/9.55;

ind_mat = [Ls 0 Lm 0;0 Ls 0 Lm;Lm 0 Lr 0; 0 Lm 0 Lr];

vr=200;

I=[1 0;0 1];

j=[0 (-1);1 0];

VMAX=sqrt(2)*vr;

f=50;

### Table 3.4 Comparison between two-level and three-level inverters.

Order

Two-level inverter

Three-level inverter

Input DC voltage

300V

300V

Speed

1442rpm

1443rpm

T.H.D

60.80%

31.14%

Fundamental harmonic

109.3rms

109.3rms

Peak value of fundamental Harmonic

154.5

155.5

Switching frequency

2400Hz

2400Hz

### Table 3.5 Comparison between two-level and three-level inverters.

Order of Frequency

Two-level Harmonics at multiples of switching frequency

Three-level Harmonics at multiples of switching frequency

1250

1.82

2.45

2450

26.91

17.71

3650

1.3

0.71

4850

20.54

6.97

7250

16.17

3.88

9650

11.33

0.57

Modulation Index

Two-level VSI

Three-level VSI

Funda

mental

peak

voltage

Vrms

THD

Funda

mental

peak

voltage

Vrms

THD

0.7

136.3

96.36

73.47

152

107.5

33.88

0.75

145.9

103.2

67.09

153.7

108.1

31.34

0.8

154

109

60.19

155.2

109.2

29.48

0.86

167

118.1

51.52

157.7

111.5

29.51

### 3.3.1 Inherent Fractal Structure in the Space Vector Representation of a Multilevel Inverter

3.31 explains the voltage space vectors of two-level inverter. The voltage space vector locations for a three-level inverter are shown in 3.32, where A00, A01. A02, A03, A04, A05 and A06 are same as locations of voltage space vectors of two-level inverter. Consider the region marked 1 in the case of two-level inverter, formed by the vectors located at A00, A01 and A02. In the case of three-level inverter, this region has three additional voltage space vectors as shown in 3.32.

It can be observed that the three additional voltage space vectors are located at the midpoints of each side of the sector of equivalent two-level inverter. The three additional switching voltage space vectors together with switching voltage space vectors located at A00, A01, and A02 results in four sectors within (sector 1) A00,A01,A02 of three-level inverter. Considering the triangular region formed by the space vectors located at A00, A01, and A02, besides the voltage space vectors of three-level inverter, nine additional voltage space vectors are present as shown in 3.33. The nine additional vectors are located at A21, A22, A23, A24, A25, A26, A27, A28, and A29. It can be clearly observed that the nine additional vectors are located at the midpoints of the sides of sectors of three-level inverter. The nine additional vectors together with the voltage space vectors of three-level inverter results in 16 sectors within (sector І) ΔAooAo1A02 of five-level inverter. In this manner each sector in the voltage space vector representation of an equivalent two-level inverter is divided into four smaller sectors, resulting in voltage space vector locations of three-level inverter. Each of the sectors of three-level inverter is further divided into four smaller sectors resulting in switching space vectors of five-level inverter. This process gets repeated for generation of space vectors of higher level inverters.

The space vector representation of a higher level inverter can be conceived as generated from the space vector representation of two-level inverter, wherein the sectors of two-level inverter get progressively divided and subdivided. The basic structure, a triangle (sector) is transformed by further dividing itself into smaller triangles. A basic structure that evolves by dividing itself into structures similar to it has an associated fractal. The switching voltage space vector representation of multilevel inverters also has an associated fractal. In fractal theory, the fractal structure with triangle as basic structure and that which gets divided into four smaller triangular regions, joined by the midpoints of the sides of the triangle is called the Sierpinski triangle.

### 3.3.2 Algorithm of Space Vector Pwm (Svpwm) Applied for Multilevel Inverters using Fractal Approach

The following algorithm explains the procedure to adapt the space vector pulse width modulation for multilevel inverters using the fractal approach.

1. Basic svpwm is build by transforming the abc to dq reference frames.

2. Identification of the sector in which the tip of the reference vector lies.

3. Determine the three nearest voltage vectors.

4. Perform the triangularisation algorithm.

5. Calculate and compare the centroids of each triangle with the reference vector.

6. For the higher level implementation of fractal approach, perform triangularisation algorithm till the reference vector is nearer to centroid of respective triangle on which triangularisation is to be performed using Eq. (4.3) to Eq. (4.5).

7. Switching states are obtained using Eq. (4.6) to Eq. (4.8).

8. Switching time durations are calculated, taking the basic two-level timings into consideration.

9. Optimized switching sequence is calculated (a) by taking the virtual zero vectors, (b) by eliminating the redundant switching states and (c) by considering optimum switching where only one switching is involved as the inverter changes from one state to another.

### 3.3.2.1 Three phase (abc) to two phase (d,q) Transformation

The three phase quantities can be transformed to their equivalent two phase quantity either in synchronously rotating frame (or) stationary frame. From this two-phase component the reference vector magnitude can be found and used for modulating the inverter output.

The three phase sinusoidal voltage components are

(4.1)

The magnitude and angle of the rotating vector can be found by mean of Clark's Transformation. Then the (d, q) coordinates of the corresponding space vector can be obtained as

(4.2)

3.3.2.2 Identification of the Sector in which the Tip of the Reference Vector Lies

The identification of sector in which the tip of reference vector lies can be done by using coordinate transformation of the reference vector in to a two dimensional coordinate system. The sector can also be determined by resolving the reference phase vector along a, b and c axes and by repeated comparison with discrete phase voltages.

After identifying the sector, the voltage vectors at the vertices of the sector are to be determined. This can be done by the comparison of reference angle with sector angle; 3.34 depicts SVPWM with six sectors in dq reference frame with  as the reference angle.

If the reference angle

 < 60°, reference vector is in sector 1

60° <  <120°, reference vector is in sector 2

120°<  <180° reference vector is in sector 3

180°<  <240° reference vector is in sector 4

240°<  <300° reference vector is in sector 5

300°<  <360° reference vector is in sector 6

The location of tip of reference frame passing through different layers can be found from 3.35. If the reference vector is in layer 1, it represents the two-level inverter operation, and when reference vector in layer 2 represents the three level inverter, when reference vector in layer 3 represents the four-level inverter, when reference vector in layer 4 represents the five-level inverter.

After identifying the sector, the voltage vectors at the vertices of the sector are to be determined. The nearest three voltage vectors of the reference vector are the vertices of the sector.

### 3.3.2.3 Determination of the Three nearest Voltage Space Vectors

The space vector voltage located in hexagon surrounded by different states of the inverter which gives different voltage magnitudes of the output voltage. These inverter states are nothing but the ON/OFF states of the devices. After identifying the sector in which the tip of reference vector is located, the voltage vectors of this sector are determined to find out the three nearest voltage vectors of space vector voltage Vsr. In order to obtain these three nearest voltage vectors, first the region in which the space vector voltage lies to be determined.

If the reference vector lies in sector 1, the three nearest vectors are determined by comparison of reference angle. If reference angle <60°, it lies in first sector and hence three nearest voltage vectors are V0, V1, V2. For example if the reference angle lies in sector 4, the nearest three vectors are V0, V4, V5 or V4, V5, V7.

### 3.3.2.4.1 Triangularisation

As explained above, due to the inherent fractal structure associated with multilevel inverter, the voltage space vector representation of two-level inverter grows to that of higher level inverters by repeated division of each sector. At every stage, the triangular region is divided into four smaller triangular regions, due to the presence of the additional voltage vectors. The three additional voltage vectors are located at the mid point of each side of sector. The sectors of higher level inverter can therefore be generated by such repeated triangularisation.

### 3.3.2.4.2 Algorithm for Triangularisation

The following steps are involved to perform the triangularisation

* Determine the sector (triangular region) on which the triangularisation is to be performed.

* Determine the midpoints of each side of the sector by Eq. (4.3) to Eq. (4.5). These are the coordinates of the three new vectors which will divide the sector into four smaller, but similar triangular regions.

* Determine the inverter states corresponding to these vectors using Eq. (4.6) to Eq (4.8).

For example, consider region I of two-level inverter formed by vertices A00, A01 and A02. The coordinates of three vertices are (00,β00), (01,β01) (02,β02) respectively. The coordinates of the three new voltage space vectors located at A1l, A12 and A13 as shown in 3.38 can be obtained from the coordinates of A00, A 01and A 02

Coordinates of A11 are

(4.3)

Coordinates of A12 are

(4.4)

Coordinates of A13 are

(4.5)

The associated switching vector states can also be determined in a similar manner. The inverter switching states corresponding to the voltage space vector located at A00, A01 and A02 are (a0 b0 c0), (a1 b1 c1) and (a2 b2 c2) respectively. The switching states of the new voltage space vectors at A1l (a3 b3 c3), A12 (a4 b4 c4) and A13 (a5 b5 c5) can be obtained as

(4.6)

(4.7)

(4.8)

where ‘X' takes a, b and c for the respective phases.

The Eq. (4.3) to Eq. (4.8) represent the arithmetic procedure used in the proposed method for dividing a triangular region (sector) into four similar regions, by generating three additional vectors situated at the mid points of the sides forming the original triangular region. This is referred as the triangularisation algorithm.

In order to generate sectors of higher level inverter by progressively dividing sectors of two-level inverter, the triangularisation algorithm is repeatedly applied. In fractal theory, algorithms whose repeated iterations will result in the pattern to grow or evolve, are referred as iterated function system, the repeated iteration of triangularisation algorithm will grow the inherent fractal structure in space vector representation of multilevel inverters. Therefore, the triangularisation algorithm can be viewed as the iterated function system for this fractal structure.

### 3.3.2.5 Calculation and Comparison of the Centroids of Each Triangle with the Reference Vector

The location of the tip of the reference voltage space vector from among these four triangular regions is found by determining the region whose centroid is closest to the tip of reference space vector. The coordinates of the centroid of an equilateral triangle can be determined as the average of coordinates of the three vertices. For an equilateral triangle with the coordinates of the vertices as (1,β1), (2, β2), (3, β3), the coordinates of the centroid (cent ,βcent) is given by,

(4.9)

The triangle with centroid closest to tip of reference space vector is ΔA11, A12 AI3. The triangularisation algorithm has to be applied once again in case of five-level inverter. The application of Eq. (4.3) to Eq. (4.8) to ΔA11A12AI3 will generate further three new voltage space vectors A23, A25, A26 and also the inverter states corresponding to these new voltage vectors. Thus the three-level inverter space vector diagram is further divided into four smaller triangles for a five-level inverter space vector diagram as shown in 3.39.

From these four triangles, one triangle enclosing the reference space vector is chosen such that its centroid is closest to tip of reference space vector. The sector is identified and the inverter states corresponding to the switching vectors located at the vertices of the identified sector are also generated simultaneously.

### 3.3.2.6 Calculation of Switching Time Duration for the Voltage Vectors.

The switching time durations are calculated, taking the basic two-level timings into consideration, as these can be extended to N- level. The switching voltage vectors approximate the volt-second of the reference space vector by operating for specific durations. The determination of duration of operation of the switching voltage space vectors is simplified by mapping the sector that is identified to enclose the reference space vector to a sector of two-level inverter.

The switching time durations of the vectors can be determined using the following formulae from Eq. (4.10) to Eq. (4.13).

(4.10)

(4.11)

(4.12)

Where (4.13)

### 3.3.2.7 Concept of Virtual Zero

According to the magnitude of the voltage vectors, they are divided into four groups as the zero voltage vectors (ZVV), the small voltage vectors (SVV), the middle voltage vectors (MVV) and the large voltage vectors (LVV). Both zero voltage vectors and small voltage vectors have redundant switching states. The mapping is done by choosing one of the three vectors of the identified sector to coincide with the actual zero vectors in the voltage space vector representation of the inverter. In the present work the vector selected to coincide with the actual zero vector is referred as virtual zero vector. The vector with minimum value for the sum of magnitudes of  and β coordinates is chosen to be the virtual zero vector for a particular sector. The sum of magnitudes of  and β coordinates represent the total offset of the vector from actual zero vector. Therefore, in the present work the virtual zero vectors chosen are at minimum offset from zero vectors.

### 3.3.3 Implementation of Fractal Approach of SVPWM for Three Level Inverters

This section explains the proposed method for generation of space vector pulse width modulation for three-level inverter using the inherent fractal structure associated with the switching space vector representation of multilevel inverter.

### 3.3.3.1 Sector Identification and Switching Vector Determination

The process of obtaining the reference space vector includes the transformation of abc to dq coordinates. Sector identification determines the triangle that encloses the tip of the reference space vector. The vertices of the triangle represent the locations of switching voltage space vectors used to synthesize the reference space vector.

The (d,q) components of the space vector of an N-level inverter can be normalized through division by Vdc/ N -1,where Vdc is the DC link voltage. In the case of a three-level inverter, the voltage Vdc, in the normalized space vector representation is therefore represented by a vector of length 2 as shown in 3.40.

For a three-level inverter, the switching vectors located at the six vertices of the hexagon forming the periphery are same as the vectors of equivalent two-level inverter, but they have the switching states as (200), (220), (020), (022), (002), (202).

The position of reference space vector A00P for a three-level inverter is as shown in 4.11. The first step in the proposed sector identification method is to determine the location of the tip of the reference space vector A00P from among the six regions of the equivalent two-level inverter. This step is implemented by comparison of instantaneous reference phase voltages. In this case the reference space vector A00P is located in region I of equivalent two-level inverter. The region I is formed by the vertices A00, A01 and A02. The coordinates of the vertices are (0,0), (2,0) and (1,1.732) respectively. The switching states corresponding to the vectors located at A00, A01 and A02 are also shown in 3.41(a). The switching states of the vector located at A00, A01 and A02 are (000, 111, 222), (200) and (220) respectively. The next step is to divide region I into four smaller triangular regions by applying the triangularisation algorithm, it will generate the coordinates of new voltage space vectors and the inverter states corresponding to these new switching vectors. The three new voltage space vectors divide region I into four smaller triangular regions marked R1, R2, R3, R4 as shown in 3.41(b). Thus by determining the switching states through triangularisation algorithm for three-level inverter, 27 switching states and the sectors are represented in 3.42.

(a) (b)

### 3.3.3.2 Determination of Centroid

The location of the tip of the reference voltage space vector A00P among these four triangular regions is found by determining the region whose centroid is closest to the tip of reference space vector. The coordinates of the centroid of an equilateral triangle can be determined as the average of coordinates of the three vertices. For an equilateral triangle with the coordinates of the vertices as (1, β1), (2, β2), (3, β3), the coordinates of the centroid (cent ,βcent) can be obtained from Eq. (4.9).

The triangle with centroid closest to tip of reference space vector is ΔA11A12A13. From among these four triangles, the triangle enclosing the reference space vector A00P is ΔA11A12A13 as its centroid is closest to tip of reference space vector. The Δ A11, A12, A13 corresponds to sector 8. The sector is identified and the inverter states corresponding to the switching vectors located at the vertices of the identified sector are also generated simultaneously.

### 3.3.3.3 Determination of Switching Duration

The voltage reference vector A00P is identified in sector 8 as shown in 4.12(b). The voltage space vector with tip located at A12 becomes the virtual zero vector for sector 8. The sector 8 thus gets mapped to sector 1 of the three-level inverter. The determination of duration now reduces to that of a two-level inverter since after mapping one of the vectors of the identified sector coincides with the zero vectors. The durations of the vectors can be determined as in case of two-level inverter.

### 3.3.3.4 Determination of Optimized Switching Sequence

Once the switching vectors are determined and their respective durations are calculated, then vectors are to be switched in an optimum sequence such that only one switching occurs when the inverter changes its state. In the space vector PWM technique, the optimum switching is achieved by using the redundant states of the zero vector for alternate switching cycles. In this thesis, the optimum switching is achieved by using two redundant switching states of the respective virtual zero vector in the alternate cycles. The tip of the reference vector A00P is located in sector 8. The switching states corresponding to the switching vectors at the vertices of sector 8 with redundancies are A11 (100,211), A12 (110,221) and A13 (210). For sector 8, the virtual zero vector at A12 has two redundant switching states while the voltage vectors at A11 has two redundancies and A13 has one redundancy. If the redundancy of the virtual zero vector is greater than two, the last two redundant switching states are selected for the virtual zero vector. For the other two vectors, if redundant states are more than one, the last redundant state is selected. In case of three-level inverter as the zero vector at A12 has two redundant switching states both of these are selected. As the space vector A11 has more than one redundant state, the last switching state is selected. As A13 has only one redundant state it is selected. This strategy of choosing the last two redundant states for the virtual zero vector and the last redundant state for the other vectors will achieve optimum switching sequence. The selection will result in switching states 110-210-211-221 for the virtual zero vector. With this switching sequence only one switching occurs as the inverter changes its state.

By following the above procedure of the fractal approach for three-level inverter, the switching states and switching sequence of a reference vector is generated. Considering twelve samples of reference vector in a single sector as shown in 3.43, by rotating reference angle from 0° to 360°, a total of seventy two samples are obtained. The optimized switching sequence for seventy two samples of three-level inverter is determined and presented in Table 4.1.

SAMPLES

STATES

SWITCHING STATES

1

4-16-17-5

100-200-210-211

2

5-17-16-4

211-210-200-100

3

4-16-17-5

100-200-210-211

4

5-17-16-4

211-210-200-100

5

6-17-5-7

110-210-211-221

6

7-5-17-6

221-211-210-110

7

6-17-5-7

110-210-211-221

8

7-5-17-6

221-211-210-110

9

6-17-18-7

110-210-220-221

10

7-18-17-6

221-220-210-110

11

6-16-18-7

110-210-220-221

12

7-18-17-6

221-220-210-110

13

6-19-18-7

110-120-220-221

14

7-18-19-6

221-220-120-110

15

6-19-18-7

110-120-220-221

16

7-18-19-6

221-220-120-110

17

6-19-9-7

110-120-121-221

18

7-9-19-6

221-121-120-110

19

6-19-9-7

110-120-121-221

20

7-9-19-6

221-121-120-110

21

8-20-19-9

010-020-120-121

22

9-19-20-8

121-120-020-010

23

8-20-19-9

010-020-120-121

24

9-19-20-8

121-120-020-010

25

8-20-21-9

010-020-021-121

26

9-21-20-8

121-021-020-010

27

8-20-21-9

010-020-021-121

28

9-21-20-8

121-021-020-010

29

10-21-9-11

011-021-121-122

30

11-9-21-10

122-121-021-011

31

10-21-9-11

011-021-121-122

32

11-9-21-10

122-121-021-011

33

10-21-22-11

011-021-022-122

34

11-22-21-10

122-022-021-011

35

10-21-22-11

011-021-022-122

36

11-22-21-10

122-022-021-011

37

10-23-22-11

011-012-022-122

38

11-22-23-10

122-022-012-011

39

10-23-22-11

011-012-022-122

40

11-22-23-10

122-022-012-011

41

10-23-13-11

011-012-112-122

42

11-13-23-10

122-112-012-011

43

10-23-13-11

011-012-112-122

44

11-13-23-10

122-112-012-011

45

12-24-23-11

001-002-012-112

46

13-23-24-12

112-012-002-001

47

12-24-23-11

001-002-012-112

48

13-23-24-12

112-012-002-001

49

12-24-25-13

001-002-102-112

50

13-25-24-12

112-102-002-001

51

12-24-25-13

001-002-102-112

52

13-25-24-12

112-102-002-001

53

14-25-13-15

101-102-112-212

54

15-13-25-14

212-112-102-101

55

14-25-13-15

101-102-112-212

56

15-13-25-14

212-112-102-101

57

14-25-26-15

101-102-202-212

58

15-26-25-14

212-202-102-101

59

14-25-26-15

101-102-202-212

60

15-26-25-14

212-202-102-101

61

14-27-26-15

101-201-202-212

62

15-26-27-14

212-202-201-101

63

14-27-26-15

101-201-202-212

64

15-26-27-14

212-202-201-101

65

14-27-5-15

101-201-211-212

66

15-5-27-14

212-211-201-101

67

14-27-5-15

101-201-211-212

68

15-5-27-14

212-211-201-101

69

4-16-27-5

100-200-201-211

70

5-27-16-4

211-201-200-100

71

4-16-27-5

100-200-201-211

72

5-27-16-4

211-201-200-100

### 3.3.4 Implementation of Algorithm for Five-level Inverter

This section explains the proposed method for generation of SVPWM for five-level inverter using the inherent fractal structure associated with the switching space vector representation of multilevel inverter. The schematic diagram of five-level inverter is shown in 3.44. The DC bus voltage is split into five levels by using four DC capacitors, C1, C2, C3 and C4. Each capacitor has Vdc/4 volts and each voltage stress will be limited to one capacitor level through clamping diodes. In the five-level inverter, clamping diodes clamped the DC bus voltage into three voltage level, +Vdc/2, +Vdc/4, 0,-Vdc/4,-Vdc/2. These states are defined as 4, 3, 2, 1 and 0. There are N3 possible states i.e., 125 states for five level inverter and it consists of (5-1) = 4 capacitors on the DC bus, 2(5-1) = 8 switching devices per phase and 2(5-2) = 6 clamping diodes per phase.

### 3.3.4.1 Sector Identification and Switching Vector Determination

In the case of five-level inverter, the voltage Vdc, in the normalized space vector representation is represented by a vector of length 4. The switching vectors located at the six vertices of the hexagon forming the periphery are same as the vectors of equivalent two-level inverter, but they have the switching states as (400), (440), (040), (044), (004), (404).

The position of reference space vector A00P for five-level inverter is as shown in 3.45. The first step in the proposed sector identification method is to determine the location of the tip of the reference space vector A00P from among the six regions of the equivalent two-level inverter. The region I is formed by the vertices A00, A01 and A02. The coordinates of the vertices are (0,0), (4,0) and (2, 2√3) respectively as shown in 3.47. The switching states of the vector located at A00, A01 and A02 are (000, 111, 222, 333, 444), (400) and (440) respectively. The next step is to divide region I into four smaller triangular regions by applying the triangularisation algorithm and generates the coordinates of the new voltage space vectors and the inverter states corresponding to these new switching vectors. The three new voltage space vectors divide region I in to four smaller triangular regions marked as R1, R2, R3 and R4 as shown in 3.47.

### 3.3.4.2 Determination of Centroids

The location of the tip of the reference voltage space vector A00P among these four triangular regions is found by determining the region whose centroid is closest to the tip of reference space vector. The coordinates of the centroid of an equilateral triangle can be determined as the average of coordinates of the three vertices.

The triangle with centroid closest to tip of reference space vector is ΔA11A12AI3. For five-level inverter the triangularisation algorithm has to be applied once again, which generates further three new voltage space vectors and also the inverter states corresponding to these new voltage vectors, thus dividing it into four smaller triangles, the triangle enclosing the reference space vector A00P is ΔA23A25A26 as its centroid is closest to tip of reference space vector. The ΔA23A25A26 corresponds to sector 27 of five-level inverter. The sector is identified and the inverter states corresponding to the switching vectors located at the vertices of the identified sector are also generated simultaneously.

### 3.3.4.3 Determination of Switching Times

For the voltage reference vectorA00P, the sector identified is sector 27. The voltage space vector with tip located at A23 becomes the virtual zero vector for sector 27. The sector 27 thus gets mapped to sector 1 of the five-level inverter. The determination of duration now reduces to that of a two-level inverter since after mapping one of the vectors of the identified sector coincides with the zero vector. The durations of the vectors can be determined using the conventional two-level inverter.

### 3.3.4.4 Determination of Optimized Switching

The tip of the reference vector A00P is located in sector 27 as shown in 3.47. The switching states corresponding to the switching vectors at the vertices of sector 27 with redundancies are A23 (210, 321, 432), A25 (310, 421) and A26 (320, 431). For sector 27, the virtual zero vector at A23 has three redundant switching states while the voltage vectors at A25 and A26 has two redundancies each. In the present work, if the redundancy of the virtual zero vector is greater than two, the last two redundant switching states are selected for the virtual zero vector. For the other two vectors, if redundant states are more than one, the last redundant state is selected. This strategy of choosing the last two redundant states for the virtual zero vector and the last redundant state for the other vectors will achieve optimum switching sequence. The selection will result in switching states 321-432 for the virtual zero vector. The other vectors have switching states 421 and 431. With these states, switching sequence of inverter for the sector number 27 is 321-421-431-432 during a sampling interval and 432-431-421-321 for the subsequent sampling interval. It may be noted that only one switching occurs as the inverter changes state.

By following the above procedure of the fractal approach for five-level inverter, the switching states and switching sequence of a reference vector is generated. Considering twelve samples of reference vector in a single sector as shown in the 3.48 by rotating reference angle from 0° to 360°, total of seventy two samples are obtained. The optimum switching pattern for these seventy two samples obtained through implementation of fractal approach for five-level inverter is shown in the Table 4.2.

SAMPLES

STATES

SWITCHING STATES

1

66-102-103-67

300-400-410-411

2

67-103-69-66

411-410-310-300

3

68-103-67-69

310-410-411-421

4

69-104-103-68

421-420-410-310

5

68-103-104-69

310-410-420-421

6

71-69-104-70

431-421-420-320

7

70-104-105-71

320-420-430-431

8

71-105-73-70

431-430-330-320

9

72-105-71-73

330-430-431-441

10

73-106-105-72

441-440-430-330

11

72-105-106-73

330-430-440-441

12

73-106-105-72

441-440-430-330

13

72-107-106-73

330-340-440-441

14

73-106-107-72

441-440-340-330

15

72-107-75-73

330-340-341-441

16

75-107-108-74

341-430-240-230

17

74-108-107-75

230-240-340-341

18

75-77-108-74

341-241-240-230

19

76-109-108-77

130-140-240-241

20

77-108-109-76

241-240-140-130

21

76-109-79-77

130-140-141-241

22

79-109-110-78

141-140-040-030

23

49-111-110-78

030-040-140-141

24

79-109-110-78

141-140-040-030

25

78-110-111-79

030-040-041-141

26

79-111-110-78

141-041-040-030

27

80-111-79-81

031-041-141-142

28

81-112-111-80

142-042-041-031

29

80-111-112-81

031-041-042-142

30

83-81-112-82

143-142-042-032

31

82-112-113-83

032-042-043-143

32

83-113-112-82

143-043-042-032

33

84-113-83-85

033-043-143-144

34

85-114-113-84

144-044-043-033

35

84-113-114-85

033-043-044-144

36

85-114-113-84

144-044-043-033

37

84-115-114-85

033-034-044-144

38

85-114-115-84

144-044-034-033

39

84-115-87-85

033-034-134-144

40

87-115-116-86

134-034-024-023

41

86-116-115-87

023-024-034-134

42

87-89-116-86

134-124-024-023

43

88-117-116-89

013-014-024-124

44

89-116-117-88

124-024-014-013

45

88-117-91-89

013-014-114-124

46

91-117-118-90

114-014-004-003

47

90-118-117-91

003-004-014-114

48

91-117-118-90

114-014-004-003

49

90-118-119-91

003-004-104-114

50

91-119-118-90

114-104-004-003

51

92-119-91-93

103-104-114-214

52

93-120-119-92

214-204-104-103

53

92-119-120-93

103-104-204-214

54

95-93-120-94

314-214-204-203

55

94-120-121-95

203-204-304-314

56

95-121-120-94

314-304-204-203

57

96-121-95-97

303-304-314-414

58

97-120-121-96

414-404-304-303

59

96-121-120-97

303-304-404-414

60

97-120-121-96

414-404-304-303

61

96-123-122-97

303-403-404-414

62

97-122-123-96

414-404-403-303

63

96-123-99-97

303-403-413-414

64

99-123-124-98

413-403-402-302

65

98-125-123-99

302-402-403-413

66

99-101-124-98

413-412-402-302

67

100-125-124-100

301-401-402-412

68

101-124-125-100

412-402-401-301

69

100-125-67-101

301-401-411-412

70

67-125-102-66

411-401-400-300

71

66-102-125-67

300-400-401-411

72

67-125-102-66

411-401-400-300

### 3.3.5 Results and Discussions

The proposed method of generation of space vector pulse width modulation using the fractal approach has been simulated for three-level and five-level inverters with a DC link voltage of 400V and modulation index of 0.8. The obtained results show the process of triangularisation and rotation of reference vector.

### 3.3.5.1 Three-level Inverter

MATLAB function is developed to give optimum switching sequence to inverter which produces the stepped voltage waveform with low distortion. In the output generated through MATLAB, ‘N' represents the level of an inverter, ‘A' represents the reference angle of the reference vector, ‘M' represents the modulation index, sector number gives the information in which the reference vector lies and sson/ ssoff indicates the ON and OFF switching sequence of the reference vector.

N = 3

A = 6

M = 0.8000

sectornumber = 7

sson =

1 0 0

2 0 0

2 1 0

2 1 1

ssoff =

2 1 1

2 1 0

2 0 0

1 0 0

ts = 2.7778e-004

3.49 represents the plot of basic SVPWM in which the first triangularisation has done using fractal approach to locate the reference vector. 3.50 is obtained when the reference vector is rotated through 0° to 360° in the d-q reference frame. In the s ‘red' points represents the location of voltage vectors, ‘blue' points represents the first triangularisation and ‘green' points represents the reference point corresponding to the reference vector in the SVPWM

From the 3.50 it is clear that the reference vector is rotated from 0° to 360° and by the proposed technique the sectors are clearly identified when the tip of reference vector moved from sector 7 to sector 24. As the reference vector is changing from one sector to other, the simultaneous switching sequence is given to the multilevel inverter.

### 3.3.5.2 Five-level Inverter

MATLAB function is developed to give optimum switching sequence to inverter which produces the stepped voltage waveform with low distortion. In the output generated through MATLAB. N represents the level of an inverter, A represents the reference angle of the reference vector, M represents the modulation index, sector number gives the information in which the reference vector lies, sson and ssoff indicates the on and off switching sequence of the reference vector.

### MATLAB Output for Five Level Inverter:

N = 5

A = 6

M = 0.8000

sectornumber = 56

sson =

3 1 0

4 1 0

4 1 1

4 2 1

ssoff =

4 2 1

4 1 1

4 1 0

3 1 0

ts = 2.7778e-004

From the plot it is clear that the reference vector is rotating from 0° to 360°. As the reference vector is changing from one sector to other, the simultaneous switching sequence is given to the multilevel inverter. 3.61 shows the sectors identified by the proposed technique when the tip of the reference vector moves through sectors 25 to 54.

The proposed method of generation of SVPWM has been simulated for a five level inverter with a DC link voltage of 400V, with Modulation index 0.8. The results for five-level with load and without load is explained. Firstly, the simulation of five-level inverter without load is performed and explained, then followed by inverter with load connected model.

### Table 4.3 Comparison of results for three and five level inverters

S.No.

Quantities

compared

Three level inverter

Five level inverter

01

Torque

10.46

10.45

02

Speed

151.4

150.8

03

Irms

5.129

4.859

04

THD (%)

5.70

3.61

From the above table we can conclude that the five-level inverter attains a steady state response faster than the three level inverter.

### 3.4 Conclusions

In this chapter the application of space vector pulse width modulation control strategy on three-level voltage source inverter is proposed and analyzed. This last aimed on the one hand to prove the effective ness of SVPWM in the contribution of switching power losses reduction and to show the advantage of three-level inverter that carry out voltages with contents of less harmonic injection than the two- level inverter. On the other hand from the simulation results, it is seen that as modulation index is increased the total harmonic distortion (THD) decreases and fundamental RMS value increases linearly. The obtained results are satisfactory.

In the field of high power, high performance applications the multi-level inverters seems to be the most promising alternative. In this thesis a new simplified SVPWM method for the three and five level inverters is proposed and described in detail. The proposed SVPWM using fractal method has the following features:

1. The switching sequence is determined with out using look up tables, so the memory of the controller can be saved.

2. The switching times of voltage vectors are calculated at the same manner as two-level SVPWM. Thus the proposed method reduces the execution time of the three and five level SVPWM.

3. It is easy to implement the triangularisation algorithm as basic arithmetic is used.

4. It can also be applied to the SVPWM method for N- level.

The validity of the presented SVPWM method is verified by simulation results.

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