Complex Instruction Set Computer (CISC), is a Microprocessor Architecture that aims to achieve complex operations with single instructions and favors the richness of the instruction set (typically as many as 200 unique instructions) over the speed with which individual instructions are executed (Manish Kulkarni, 2008:3). Reduced Instruction Set Computer (RISC) is a CPU design that recognizes only a limited number of instructions (Derek Ng, n.d.).
Examples of RISC are LC3, MIPS, PowerPC (IBM), SPARC (Sun) (CIT 595, 2007:4).
Examples of CISC are System/360, PDP-11, VAX, 68000, and x86 (http://en.wikipedia.org/wiki/Complex_Instruction_Set_Computer, 2007).
Features of CISC (Derek Ng, n.d.).
- Instructions can operate directly on memory
- Small number of general purpose registers
- Instructions take multiple clocks to execute
- Few lines of code per operation
Features of RISC (Derek Ng, n.d.).
- Reduced" instruction set
- Executes a series of simple instruction instead of a complex instruction
- Instructions are executed within one clock cycle
- Incorporates a large number of general registers for arithmetic operations to avoid storing variables on a stack in memory
- Only the load and store instructions operate directly onto memory
- Pipelining = speed
RISC and CISC architectures are becoming more and more alike. Many of today's RISC chips support just as many instructions as yesterday's CISC chips. The PowerPC 601, for example, supports more instructions than the Pentium. Yet the 601 is considered a RISC chip, while the Pentium is definitely CISC. Furthermore today's CISC chips use many techniques formerly associated with RISC chips (http://www.hitequest.com/Kiss/risc_cisc.htm , 2002).
The biggest threat for CISC and RISC might not be each other, but a new technology called EPIC. EPIC stands for Explicitly Parallel Instruction Computing. Like the word parallel already says EPIC can do many instruction executions in parallel to one another ( Armin Gerritsen, 1999).
EPIC is a created by Intel and is in a way a combination of both CISC and RISC. This will in theory allow the processing of Windows-based as well as UNIX-based applications by the same CPU (Armin.Gerritsen, 1999).
- Armin Gerritsen (1999) RISC vs CISC [Online]. Available from: http://www.docstoc.com/docs/13433593/CISC-VS-RISC (Accessed: 23 January 2010).
- CIT 595 (2007) RISC vs. CISC
- Derek Ng (n.d.) RISC / CISC Architecture
- Hitequest (2002) A CPU: RISC vs CISC [Online]. Available from: http://www.hitequest.com/Kiss/risc_cisc.htm (Accessed: 23 January 2010).
- Manish Kulkarni (2008) Complex Instruction Set Computer (CISC)
- Wikipedia (2007) Complex Instruction Set Computer [Online]. Available from: http://en.wikipedia.org/wiki/Complex_Instruction_Set_Computer (Accessed: 23 January 2010).